HCPL-7860 Datasheet, PDF (21/28 Pages) Agilent(Hewlett-Packard) – Isolated 15-bit A/D Converter

Table 3. Register Configuration.
Configuration Data Bits
Register Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Channel 1 Conversion Mode
Channel 1
0
Offset Cal
High
High
Low
Low
Low
Channel 2 Conversion Mode
Channel 2
Offset Cal
1
High
High
Low
Low
Low
Threshold
Detection Time
2
Threshold Level
High
Low
Low
Low
Low
Pre-Trigger Mode
3
Reserved
Low
Low
Low
Low
Low
Note: Bold italic type indicates default values. Reserved bits should be set low.
Bit 2
Reserved
Low
Reserved
Low
Low
Low
Address Bits
Bit 1 Bit 0
Low
Low
Low High
High Low
High High
Conversion Mode
The conversion mode determines
the speed/resolution trade-off for
the Isolated A/D converter. The
four MSBs of registers 0 and 1
determine the conversion mode
for the appropriate channel. The
bit settings for choosing a partic-
ular conversion mode are shown
in Table 4 below. See Table 2 for
a summary of how performance
changes as a function of conver-
sion mode setting. Combinations
of data bits not specified in Table
4 below are not recommended.
Table 4. Conversion Mode Configuration.
Conversion
Mode
1
2
3
4
5
Bit 7
Low
Low
High
High
High
Configuration Data Bits
Bit 6
Bit 5
High
Low
Low
High
High
High
High
Low
Low
High
Note: Bold italic type indicates default values.
Bit 4
High
High
Low
Low
Low
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