HCPL-3120 Datasheet, PDF (10/15 Pages) Agilent(Hewlett-Packard) – 2.0 Amp Output Current IGBT Gate Drive Optocoupler

1
I_F = 7 to 16 mA
2
+ ^{500 Ω}
10 KHz ^–
50% DUTY
3
CYCLE
4
8
0.1 µF
I_F
7
+
–
V_CC = 15
to 30 V
t_r
V_O
6
10 Ω
10 nF
5
V_OUT
t_PLH
t_f
90%
50%
10%
t_PHL
Figure 23. t_PLH, t_PHL, t_r, and t_f Test Circuit and Waveforms.
1
8
I_F
A
B
2
7
5V
+
–
3
6
4
5
+
V_CM = 1500 V
V_CM
0.1 µF
V_O
+
–
V_CC = 30 V
0V
∆t
V_O
SWITCH AT A: I_F = 10 mA
V_O
SWITCH AT B: I_F = 0 mA
δV ₌ V_CM
δt ∆t
V_OH
V_OL
Figure 24. CMR Test Circuit and Waveforms.
Applications Information
Eliminating Negative IGBT
Gate Drive
To keep the IGBT firmly off, the
HCPL-3120 has a very low
maximum V_OL specification of
0.5 V. The HCPL-3120 realizes
this very low V_OL by using a
DMOS transistor with 1 Ω
(typical) on resistance in its pull
down circuit. When the HCPL-
3120 is in the low state, the IGBT
gate is shorted to the emitter by
Rg + 1 Ω. Minimizing Rg and the
lead inductance from the HCPL-
3120 to the IGBT gate and
emitter (possibly by mounting the
HCPL-3120 on a small PC board
directly above the IGBT) can
eliminate the need for negative
IGBT gate drive in many applica-
tions as shown in Figure 25. Care
should be taken with such a PC
board design to avoid routing the
+5 V
1
270 Ω
2
CONTROL
INPUT
3
74XXX
OPEN
4
COLLECTOR
HCPL-3120
8
0.1 µF
7
6
+ ^{VCC = 18 V}
–
Rg
Q1
5
Q2
IGBT collector or emitter traces
close to the HCPL-3120 input as
this can result in unwanted
coupling of transient signals into
the HCPL-3120 and degrade
performance. (If the IGBT drain
must be routed near the HCPL-
3120 input, then the LED should
be reverse-biased when in the off
state, to prevent the transient
signals coupled from the IGBT
drain from turning on the
HCPL-3120.)
+ HVDC
3-PHASE
AC
- HVDC
Figure 25. Recommended LED Drive and Application Circuit.
1-191