RFM22 Datasheet, PDF (77/150 Pages) –

RFM22
Register 04h. Interrupt/Status 2
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
iswdet
ipreaval ipreainval
irssi
iwut
ilbd
ichiprdy
ipor
Type
R
R
R
R
R
R
R
R
Reset value = xxxxxxxx
Bit
Name
Function
Sync Word Detected.
7
iswdet
When a sync word is detected this bit will be set to 1.
Valid Preamble Detected.
6
ipreaval
When a preamble is detected this bit will be set to 1.
Invalid Preamble Detected.
5
ipreainval When the preamble is not found within a period of time after the RX is enabled,
this bit will be set to 1.
RSSI.
4
irssi
When RSSI level exceeds the programmed threshold this bit will be set to 1.
Wake-Up-Timer.
3
iwut
On the expiration of programmed wake-up timer this bit will be set to 1.
Low Battery Detect.
When a low battery event is been detected this bit will be set to 1. This interrupt
2
ilbd
event is saved even if it is not enabled by the mask register bit and causes an
interrupt after it is enabled.
Module Ready (XTAL).
1
ichiprdy
When a module ready event has been detected this bit will be set to 1.
Power-on-Reset (POR).
0
ipor
When the module detects a Power on Reset above the desired setting this bit
will be set to 1.
When any of the Interrupt/Status Register 2 bits change state from 0 to 1 the control block will notify the
microcontroller by setting the nIRQ pin LOW if it is enabled in the Interrupt Enable 2 register. The nIRQ pin will go
to HIGH and all the enabled interrupt bits will be cleared when the microcontroller reads this address. If any of
these bits is not enabled in the Interrupt Enable 2 register then it becomes a status signal that can be read anytime
in the same location and will not be cleared by reading the register.
77
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