HMC714LP5 Datasheet, PDF (29/40 Pages) Hittite Microwave Corporation – DUAL RMS POWER DETECTOR 0.1 - 3.9 GHz

v05.0309
HMC714LP5 / 714LP5E
DUAL RMS POWER DETECTOR
0.1 - 3.9 GHz
12
Channel Isolation/Interface
Channel isolation/interference is grouped into two
categories:
On-chip inter-channel interference, and
Off-chip inter-channel interference.
Off-chip interference between channels should be
considered, especially at small signal levels, since
HMC714LP5E is capable of detecting a signal over a
very wide dynamic range (70 dB+). There are two main
mechanisms through which the interference between the
channels may affect measurement accuracy. The first
one is the direct coupling of the RF signal from one RF
channel input to the other RF channel input. Baluns on the
detector inputs usually contribute to inter-channel coupling,
as does PC board design and the quality of the soldered
connections.
On-chip inter-channel interference, herein referred to as
“input-output channel isolation”, usually manifests itself as
drift on one detector output due to a relatively strong signal
present at the other detector input. Quantitatively, the input-
output channel isolation is defined as the difference between
the input power levels at both channels when the interfering
(higher power level) channel causes a 1 dB measurement
drift in the interfered (lower power level) channel. Worst
case channel interference occurs when one channel has an
input signal level just over its detection threshold.
Input-Output Channel isolation for HMC714LP5E is:
55+ dB input-output isolation at 900 MHz
45 dB input-output isolation up to 2.7 GHz
35 dB input-output isolation up to 5.8 GHz.
If the same signal frequency is injected into both channels
for this Input-Output Channel Isolation measurement, the
interference will manifest as a phase delay. A slight offset in
signal frequency between the two channels can be seen as a
ripple at the output of the channel with the lower power level
applied at its input. Peaks in the output ripple correspond
to the worst-case phase shift for input-output interference.
The frequency of the output ripple will be equal to the “beat”
frequency between the two channels. The magnitude of
the output ripple will depend on the integration and offset
capacitors connected to C_INT and C_OFS pins, respectively.
The output ripple is reduced by increasing the value of
the integration capacitance (C_INT), thereby decreasing
the integrator bandwidth. The data was collected using a
100kHz offset between the channels.
Input to Input Isolations with
ETC1-1-13 Baluns
0
-10
Input A->Input B
-20
Input B->Input A
-30
-40
-50
-60
-70
-80
-90
-100
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
FREQUENCY (GHz)
Interference to an Input Signal (INB
Power Fixed) with Interfering Signal on
the other Channel (INA Power Swept) ^[1]
3
2.5
0.5 GHz
0.9 GHz
1.9 GHz
2
2.7 GHz
3.9 GHz
5.8 GHz
1.5
1
0.5
0
-30 -25 -20 -15 -10 -5 0 5 10 15
CHANNEL A INPUT POWER (dBm)
Interference to an Input Signal (INA
Power Fixed) with Interfering Signal on
the other Channel (INB Power Swept) ^[1]
3
2.5
0.5 GHz
0.9 GHz
1.9 GHz
2.7 GHz
2
3.9 GHz
5.8 GHz
1.5
1
0.5
0
-30 -25 -20 -15 -10 -5 0 5 10 15
CHANNEL B INPUT POWER (dBm)
12 - 142
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