HB288032MM1 Datasheet, PDF (65/80 Pages) Hitachi Semiconductor – MultiMediaCard 32 MByte

HB288032MM1
Cyclic Redundancy Check (CRC)
The intention of the ECC method is to protect the HB288032MM1 against permanent storage failures in the
memory field of the card. To protect the data against errors generated during the transport over the
MultiMediaCard bus dynamically, an additional feature is implemented: the cyclic redundancy check
(CRC). Following the MultiMediaCard standard, the HB288032MM1 uses two different CRC codes to
protect the data and the command/response transfer between card and host. Unlike the ECC, the CRC is
intended only to detect transfer errors and not to correct them “on the fly”. When a CRC error is detected
the host has to react. This is normally done by repeating the last command. The first CRC code is intended
to protect the command and response frames. They are also used to synchronize the data stream. This
CRC is generated with and checked against the following polynomial:
CRC polynomial: G(x) = x⁷ + x³ + 1
M(x) = (start bit) * x³⁹ +...+ (last bit) * x⁰
CRC[6...0] = Remainder [(M(x) * x⁷)/G(x)]
One CRC is checked in the HB288032MM1 for every command. For each response a CRC is generate in
the HB288032MM1. Each data block read from the HB288032MM1 will be succeeded by redundancy bits
generated with the second CRC. The code is usable for payload lengths of up to 2048 Bytes:
CRC polynomial: G(x) = x¹⁶ + x¹² +x⁵ + 1,
M(x) = (start bit) * xⁿ + x^n-1 +...+ (last bit) * x⁰ , with n < 2048*8
CRC[15...0] = Remainder [(M(x) * x¹⁶) / G(x)]
Both CRCs are mandatory for the card and the host.
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