HB288032MM1 Datasheet, PDF (64/80 Pages) Hitachi Semiconductor – MultiMediaCard 32 MByte

HB288032MM1
Timing Values
Symbol
Min
N_CS
N_CR
N_RC
N_AC
N_WR
N_EC
N_DS
Note:
0
1
1
1
1
0
0
1. Refer to Chapter “Time-out Condition”.
Max
—
8
—
spec. in the CSD*¹
—
—
—
Unit
8 clock cycles
8 clock cycles
8 clock cycles
8 clock cycles
8 clock cycles
8 clock cycles
8 clock cycles
Error Handling
MultiMediaCards are defined as error free devices or as devices with a defined maximum bit error rate
(with external error correction circuitry). To correct defects in the memory field of the cards the system
may include error correction codes in the payload data (ECC). This correction is intended to correct static
errors. Additionally two methods of detecting errors generated during the data transfer (dynamic errors)
via a cyclic redundancy check (CRC) are implemented.
On Card Error Correction Code (ECC)
The HB288032MM1 is free of static errors. All errors are covered inside the card, even errors occurring
during the livetime of HB288032MM1 are covered for the user. The only effect which may be notified by
the end user is, that the overall memory capacity may be reduced by small number of blocks. All flash
handling is done on card, so that no external error correction is needed.
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