HD66710 Datasheet, PDF (59/73 Pages) Hitachi Semiconductor – (Dot Matrix Liquid Crystal Display Controller/Driver)

HD66710
Power on
• Wait for more than 15 ms
after V_CC rises to 4.5V
(V_CC = 5V)
• Wait for more than 40 ms
after V_CC rises to 2.7V
(V_CC = 3V)
RS R/W DB7 DB6 DB5 DB4
000011
Wait for more than 4.1 ms
RS R/W DB7 DB6 DB5 DB4
000011
Wait for more than 100 µs
RS R/W DB7 DB6 DB5 DB4
000011
RS R/W DB7 DB6 DB5 DB4
000010
000010
0 0N1 0 0
000010
00N0 * *
000000
001000
000000
000001
000000
0 0 0 1 I/D S
Important Notice
Notes: 1. When DB3 to DB0 pins are open in 4-bit mode,
the N, RE, BE, LP bits are set to “1”. In this case,
instruction time becomes four times in a low
power mode (LP = “1”).
2. The low power mode is available in this step, so
instruction time takes four times.
BF cannot be checked before this instruction.
Function set (Interface is 8 bits long.)
BF cannot be checked before this instruction.
Function set (Interface is 8 bits long.)
BF cannot be checked before this instruction.
*1
Function set (Interface is 8 bits long.)
BF can be checked after the following instructions.
When BF is not checked, the waiting time between
instructions is longer than the execution instuction
time. (See Table 7.)
*1
Function set (4-bit mode).
*2
Function set (4-bit mode, N specification).
BE, LP are clear to “0”
Function set (4-bit mode, N specification).
Display off
Display clear
Entry mode set (I/D, S specification)
Initialization ends
Figure 26 4-Bit Interface
349