HD66710 Datasheet, PDF (30/73 Pages) Hitachi Semiconductor – (Dot Matrix Liquid Crystal Display Controller/Driver)

HD66710
Table 7 Instructions
Instruction RS
Clear
0
display
Return
0
home
Entry mode 0
set
Display 0
on/off
control
(RE = 0)
Extension 0
function set
(RE = 1)
Cursor or 0
display
shift
Function 0
set
(RE = 0)
(RE = 1) 0
Set
0
CGRAM
address
(RE = 0)
Set
0
DDRAM
address
(RE = 0)
Set
0
SEGRAM
address
(RE = 1)
Code
: R/ DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Description
0 0 0 0 0 0 0 0 1 Clears entire display and
sets DDRAM address 0 in
address counter.
Execution Time
(Max) (when f_cp or
f_OSC is 270 kHz)
1.52 ms
0 0 0 0 0 0 0 1 — Sets DDRAM address 0 in 1.52 ms
address counter. Also
returns display from being
shifted to original position.
DDRAM contents remain
unchanged.
0 0 0 0 0 0 1 I/D S Sets cursor move direction 37 µs
and specifies display shift.
These operations are
performed during data write
and read.
0 0 0 0 0 1 D C B Sets entire display (D) on/off, 37 µs
cursor on/off (C), and
blinking of cursor position
character (B).
0 0 0 0 0 1 FW B/W NW Sets a font width, a black- 37 µs
white inverting cursor (B/W),
a 6-dot font width (FW), and
a 4-line display (NW).
0 0 0 0 1 S/C R/L — — Moves cursor and shifts
display without changing
DDRAM contents.
37 µs
0 0 0 1 DL N RE — — Sets interface data length 37 µs
(DL), number of display lines
(N), and extension register
write enable (RE).
0 0 0 1 DL N RE BE LP Sets CGRAM/SEGRAM
37 µs
blinking enable (BE), and low
power mode (LP). LP is
available when the EXT pin
is low.
0 0 1 ACG ACG ACG ACG ACG ACG Sets CGRAM address.
37 µs
CGRAM data is sent and
received after this setting.
0 1 ADD ADD ADD ADD ADD ADD ADD Sets DDRAM address.
37 µs
DDRAM data is sent and
received after this setting.
0 1 HDS HDS HDS *— ASG ASG ASG Sets SEGRAM address. 37 µs
DDRAM data is sent and
received after this setting.
Also sets a horizontal dot
scroll quantity (HDS).
320