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| HN58C256A Datasheet, PDF (19/25 Pages) Hitachi Semiconductor – 256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function (HN58C257A) | |||
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HN58C256A Series, HN58C257A Series
(2) Protection by RES (only the HN58C257A series)
The unprogrammable state can be realized by that the CPUâs reset signal inputs directly to the EEPROMâs
RES pin. RES should be kept VSS level during VCC on/off.
The EEPROM breaks off programming operation when RES becomes low, programming operation doesnât
finish correctly in case that RES falls low during programming operation. RES should be kept high for 10 ms
after the last data input.
VCC
RES
WE
or CE
Program inhibit
1 µs min 100 µs min
Program inhibit
10 ms min
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