HD61202U Datasheet, PDF (17/33 Pages) Hitachi Semiconductor – Dot Matrix Liquid Crystal GraphicDisplay Column Driver

HD61202U
Detailed Explanation
Display On/Off
R/W D/I DB7
DB0
Code 0 0 0 0 1 1 1 1 1 D
MSB
LSB
The display data appears when D is 1 and disappears when D is 0. Though the data is not on the screen
with D = 0, it remains in the display data RAM. Therefore, you can make it appear by changing D = 0
into D = 1.
Display Start Line
R/W D/I DB7
DB0
Code 0 0 1 1 A A A A A A
MSB
LSB
Z address AAAAAA (binary) of the display data RAM is set in the display start line register and
displayed at the top of the screen. Figure 4 shows examples of display (1/64 duty cycle) when the start
line = 0–3. When the display duty cycle is 1/64 or more (ex. 1/32, 1/24 etc.), the data of total line number
of LCD screen, from the line specified by display start line instruction, is displayed.
Set Page (X Address)
R/W D/I DB7
DB0
Code 0 0 1 0 1 1 1 A A A
MSB
LSB
X address AAA (binary) of the display data RAM is set in the X address register. After that, writing or
reading to or from MPU is executed in this specified page until the next page is set. See Figure 5.
Set Y Address
R/W D/I DB7
DB0
Code 0 0 0 1 A A A A A A
MSB
LSB
Y address AAAAAA (binary) of the display data RAM is set in the Y address counter. After that, Y
address counter is increased by 1 every time the data is written or read to or from MPU.
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