HMNR28D Datasheet, PDF (8/13 Pages) Hanbit Electronics Co.,Ltd – 5.0 or 3.3V, 16K bit (2 Kbit x 8) TIMEKEEPER NVSRAM

HANBit
HMNR28D(V)
WRITE Mode AC Characteristics
Symbol
Parameter⁽¹⁾
HMNR28D
HMNR28DV
-70
-85
Unit
Min Max Min Max
tAVAV
WRITE Cycle Time
70
85
nS
tAVWL
Address Valid to WRITE Enable Low
0
0
nS
tAVEL
Address Valid to Chip Enable Low
0
0
nS
tWLWH
WRITE Enable Pulse Width
45
55
nS
tELEH
Chip Enable Low to Chip Enable High
50
60
nS
tWHAX
WRITE Enable High to Address Transition
0
0
nS
tEHAX
Chip Enable High to Address Transition
0
0
nS
tDVWH
Input Valid to WRITE Enable High
25
30
nS
tDVEH
Input Valid to Chip Enable High
25
30
nS
tWHDX
WRITE Enable High to Input Transition
0
0
nS
tEHDX
tWLQZ(2,3)
Chip Enable High to Input Transition
WRITE Enable Low to Output High-Z
0
0
nS
20
25
nS
tAVWH
Address Valid to WRITE Enable High
55
65
nS
tAVEH
Address Valid to Chip Enable High
55
65
nS
tWHQX(2,3)
WRITE Enable High to Output Transition
5
5
nS
Note : 1. Valid for Ambient Operating Temperature: TA = 0 to 70° C; VCC = 4.5 to 5.5V or 3.0 to 3.6V (except where noted).
2. CL = 5pF.
3. If /CE goes low simultaneously with /WE going low, the outputs remain in the high impedance state.
Data Retention Mode
With valid VCC applied, the HMNR28D(V) operates as a conventional Bytewide static RAM. Should the supply voltage
decay, the RAM will automatically deselect, write protecting itself when VCC falls between VPFD (max), VPFD (min) window.
All outputs become high impedance and all inputs are treated as “Don't care.”
Note : A power failure during a WRITE cycle may corrupt data at the current addressed location, but does not jeopardize
the rest of the RAM's content. At voltages below VPFD (min), the memory will be in a write protected state, provided the VCC
fall time is not less than tF. The HMNR28D(V) may respond to transient noise spikes on VCC that cross into the deselect
window during the time the device is sampling VCC. Therefore, decoupling of the power supply lines is recommended.
When VCC drops below VSO, the control circuit switches power to the internal battery, preserving data and powering the
clock. The internal energy source will maintain data in the HMNR28D(V) for an accumulated period of at least 10 years at
room temperature. As system power rises above VSO, the battery is disconnected, and the power supply is switched to
external VCC . Write protection continues until VCC reaches VPFD (min) plus tREC (min). Normal RAM operation can resume
tREC after VCC exceeds VPFD (max).
URL : www.hbe.co.kr
Rev. 0.0 (March, 2002)
8
HANBit Electronics Co.,Ltd.