HMNR28D Datasheet, PDF (5/13 Pages) Hanbit Electronics Co.,Ltd – 5.0 or 3.3V, 16K bit (2 Kbit x 8) TIMEKEEPER NVSRAM

HANBit
HMNR28D(V)
OPERATING MODES
The 24-pin, 600mil DIP Hybrid houses a controller chip, SRAM, quartz crystal, and a long life lithium button cell in a single
package. The clock locations contain the year, month, date, day, hour, minute, and second in 24 hour BCD format.
Corrections for 28, 29 (leap year-compliant until the year 2100), 30, and 31 day months are made automatically. Byte
7F8h is the clock control register. This byte controls user access to the clock information and also stores the clock
calibration setting. The seven clock bytes (7FFh-7F9h) are not the actual clock counters, they are memory locations
consisting of READ/WRITE memory cells within the static RAM array. The HMNR28D includes a clock control circuit which
updates the clock bytes with current information once per second. The information can be accessed by the user in the
same manner as any other location in the static memory array. The HMNR28D(V) also has its own Power-Fail Detect
circuit. This control circuitry constantly monitors the supply voltage for an out of tolerance condition.
When VCC is out of tolerance, the circuit write protects the TIMEKEEPER register data and SRAM, providing data security
in the midst of unpredictable system operation. As VCC falls, the control circuitry automatically switches to the battery,
maintaining data and clock operation until valid power is restored.
Operating Modes
Mode
Deselect
WRITE
READ
READ
VCC
4.5V to 5.5V
or
3.0V to 3.6V
Deselect
VSO to VPFD (min)
Deselect
≤ VSO (1)
/CE
/OE
/WE
DQ7 – DQ0
Power
VIH
X
X
High-Z
Standby
VIL
X
VIL
DIN
Active
VIL
VIL
VIH
DOUT
Active
VIL
VIH
VIH
High
Active
X
X
X
High
CMOS
Standby
X
X
X
High
Battery Back-
up
Note : X = VIH or VIL; VSO = Battery Back-up Switchover Voltage.
URL : www.hbe.co.kr
Rev. 0.0 (March, 2002)
5
HANBit Electronics Co.,Ltd.