S10200-02 Datasheet, PDF (8/11 Pages) Hamamatsu Corporation – Back-thinned TDI-CCD Operating the back-thinned CCD in TDI mode delivers high sensitivity.

Back-thinned TDI-CCD S10200-02, S10201-04, S10202-08, S10202-16
s Pin connections
S10200-02
Pin No. Symbol
Function
1
P2V CCD vertical register clock-2
2
P3V CCD vertical register clock-3
3
P1V CCD vertical register clock-1
4
TGa Transfer gate-a
5
DGND Digital GND
6
AGND Analog GND
7
-
8
OSa1 Output transistor source-a 1
9
OSa2 Output transistor source-a 2
10
-
11 AGND Analog GND
12
OD Output drain
13
RD Reset drain
14
OG Output gate
15
OFD Overflow drain
16 DGND Digital GND
17
RGa Reset gate-a
18
SGa Summing gate-a
19
P1Ha
CCD horizontal register-a
clock-2
20
P2Ha
CCD horizontal register-a
clock-2
21
P2Hb
CCD horizontal register-b
clock-2
22
P1Hb
CCD horizontal register-b
clock-1
23
SGb Summing gate-b
24
RGb Reset gate-b
25 DGND Digital GND
26
OFG Overflow gate
27
OG Output gate
28
RD Reset drain
29
OD Output drain
30 AGND Analog GND
31
-
32
OSb2 Output transistor source-b2
33
OSb1 Output transistor source-b1
34
-
35 AGND Analog GND
36 DGND Digital GND
37
TGb Transfer gate-b
38
P1V CCD vertical register clock-1
39
P3V CCD vertical register clock-3
40
P2V CCD vertical register clock-2
Pin No. Symbol
1
P2V
2
P3V
3
P1V
4
TGa
5
DGND
6
AGND
7
OSa1
8
OSa2
9
OSa3
10 OSa4
11 AGND
12
OD
13
RD
14
OG
15
OFD
16 DGND
17
RGa
18
SGa
19 P1Ha
20 P2Ha
21 P2Hb
22 P1Hb
23
SGb
24
RGb
25 DGND
26
OFG
27
OG
28
RD
29
OD
30 AGND
31 OSb4
32 OSb3
33 OSb2
34 OSb1
35 AGND
36 DGND
37
TGb
38
P1V
39
P3V
40
P2V
S10201-04
Function
CCD vertical register clock-2
CCD vertical register clock-3
CCD vertical register clock-1
Transfer gate-a
Digital GND
Analog GND
Output transistor source-a1
Output transistor source-a2
Output transistor source-a3
Output transistor source-a4
Analog GND
Output drain
Reset drain
Output gate
Overflow drain
Digital GND
Reset gate-a
Summing gate-a
CCD horizontal register-a
clock-2
CCD horizontal register-a
clock-2
CCD horizontal register-b
clock-2
CCD horizontal register-b
clock-1
Summing gate-b
Reset gate-b
Digital GND
Overflow gate
Output gate
Reset drain
Output drain
Analog GND
Output transistor source-b4
Output transistor source-b3
Output transistor source-b2
Output transistor source-b1
Analog GND
Digital GND
Transfer gate-b
CCD vertical register clock-1
CCD vertical register clock-3
CCD vertical register clock-2
8