S10200-02 Datasheet, PDF (10/11 Pages) Hamamatsu Corporation – Back-thinned TDI-CCD Operating the back-thinned CCD in TDI mode delivers high sensitivity.

Back-thinned TDI-CCD S10200-02, S10201-04, S10202-08, S10202-16
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
Symbol
P2V
P3V
P1V
TGa
DGND
OFG
OFD
RD
OD
AGND
OSa1
OSa2
OSa3
OSa4
OSa5
OSa6
OSa7
OSa8
AGND
OG
DGND
RGa1
SGa1
P1Ha1
P2Ha1
P2Ha2
P1Ha2
DGND
AGND
OSa9
OSa10
OSa11
OSa12
OSa13
OSa14
OSa15
OSa16
AGND
OD
RD
OG
OFD
OFG
DGND
RGa2
SGa2
TGa
P1V
P3V
P2V
Function
CCD vertical register clock-2
CCD vertical register clock-3
CCD vertical register clock-1
Transfer gate-a
Digital GND
Overflow gate
Overflow drain
Reset drain
Output drain
Analog GND
Output transistor source-a1
Output transistor source-a2
Output transistor source-a3
Output transistor source-a4
Output transistor source-a5
Output transistor source-a6
Output transistor source-a7
Output transistor source-a8
Analog GND
Output gate
Digital GND
Reset gate-a 1
Summing gate-a 1
CCD horizontal register-a1
clock-2
CCD horizontal register-a1
clock-2
CCD horizontal register-a2
clock-2
CCD horizontal register-a2
clock-1
Digital GND
Analog GND
Output transistor source-a9
Output transistor source-a10
Output transistor source-a11
Output transistor source-a12
Output transistor source-a13
Output transistor source-a14
Output transistor source-a15
Output transistor source-a16
Analog GND
Output drain
Reset drain
Output gate
Overflow drain
Overflow gate
Digital GND
Reset gate-a 2
Summing gate-a 2
Transfer gate-a
CCD vertical register clock-1
CCD vertical register clock-3
CCD vertical register clock-2
S10202-16
Pin No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Symbol
P2V
P3V
P1V
TGb
SGb2
RGb2
DGND
OFG
OFD
OG
RD
OD
AGND
OSb16
OSb15
OSb14
OSb13
OSb12
OSb11
OSb10
OSb9
AGND
DGND
P1Hb2
P2Hb2
P2Hb1
P1Hb1
SGb1
RGb1
DGND
OG
AGND
OSb8
OSb7
OSb6
OSb5
OSb4
OSb3
OSb2
OSb1
AGND
OD
RD
OFD
OFG
DGND
TGb
P1V
P3V
P2V
Function
CCD vertical register clock-2
CCD vertical register clock-3
CCD vertical register clock-1
Transfer gate-b
Summing gate-b 2
Reset gate-b 2
Digital GND
Overflow gate
Overflow drain
Output gate
Reset drain
Output drain
Analog GND
Output transistor source-b16
Output transistor source-b15
Output transistor source-b14
Output transistor source-b13
Output transistor source-b12
Output transistor source-b11
Output transistor source-b10
Output transistor source-b9
Analog GND
Digital GND
CCD horizontal register-b2
clock-2
CCD horizontal register-b2
clock-2
CCD horizontal register-b1
clock-2
CCD horizontal register-b1
clock-2
Summing gate-b 1
Reset gate-b 1
Digital GND
Output gate
Analog GND
Output transistor source-b8
Output transistor source-b7
Output transistor source-b6
Output transistor source-b5
Output transistor source-b4
Output transistor source-b3
Output transistor source-b2
Output transistor source-b1
Analog GND
Output drain
Reset drain
Overflow drain
Overflow gate
Digital GND
Transfer gate-b
CCD vertical register clock-1
CCD vertical register clock-3
CCD vertical register clock-2
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