S10200-02 Datasheet, PDF (4/11 Pages) Hamamatsu Corporation – Back-thinned TDI-CCD Operating the back-thinned CCD in TDI mode delivers high sensitivity.

Back-thinned TDI-CCD S10200-02, S10201-04, S10202-08, S10202-16
s Operating conditions (TDI mode, Ta=25 °C)
Parameter
Symbol
Output transistor drain voltage
VOD
Reset drain voltage
VRD
Output gate voltage
VOG
Substrate voltage
VDGND, VAGND
Overflow drain voltage
VOFD
Overflow gate voltage
VOFG
Vertical shift register
High VP1VH, VP2VH, VP3VH
clock voltage
Low VP1VL, VP2VL, VP3VL
Horizontal shift register
High
VP1HH, VP2HH
clock voltage
Low
VP1HL, VP2HL
Summing gate voltage
High
Low
VSGH
VSHL
Reset gate voltage
High
Low
VRGH
VRGL
Transfer gate voltage
High
Low
VTGH
VTGL
Min.
12
11
3
-
4
0
4
-6
4
-6
4
-6
7
-6
4
-6
s Electrical and optical characteristics (Ta=25 °C)
Parameter
Symbol
Saturation output voltage
Vsat
Full well capacity *¹
FW
CCD node sensitivity
Sv
Dark current *^1, *²
DS
Readout noise*³
Nr
Dynamic range
DR
Photo response non-uniformity *⁴
PRNU
Spectral response range
λ
*1: TDI mode
*2: Line rate 50 kHz, accumulated dark signal after 128-stage transfer
*3: Readout frequency 30 MHz
*4: Measured at one-half of the full well. In TDI mode.
Min.
-
100
3
-
-
-
-
-
s Electrical characteristics (Ta=25 °C)
Parameter
Symbol
Min.
Signal output frequency
fc
-
Reset clock frequency
frg
-
Vertical shift register
capacitance
S10200-02
-
S10201-04
CP1V, CP2V, CP3V
-
S10202-08/-16
-
S10200-02
-
Line rate
S10201-04
S10202-08
LR
-
-
S10202-16
-
S10200-02
-
Horizontal shift register
capacitance
S10201-04
S10202-08/-16
CP1H, CP2H
-
-
S10200-02
-
Transfer gate capacitance S10201-04
CTG
-
S10202-08/-16
-
S10200-02
-
Summing gate capacitance S10201-04
CSG
-
S10202-08/-16
-
S10200-02
-
Reset gate capacitance
S10201-04
CRG
-
S10202-08/-16
-
Charge transfer efficiency *⁵
CTE
0.99995
Output level *⁶
Vout
-
Output impedance *⁷
Zo
-
Output MOSFET supply current/node
Ido
-
Power consumption *^6, *⁷
P
-
*5: Charge transfer efficiency per pixel, measured at half of the full well capacity.
*6: VOD=15 V, Load resistance=2.2 kΩ
*7: Power consumption of the on-chip amplifier plus load resistance.
Typ.
15
12
5
0
6
4
6
-5
6
-5
6
-5
8
0
6
-5
Typ.
FW × Sv
120
3.5
100
100
1200
±3
200 to 1100
Typ.
30
30
250
400
650
50
50
50
100
50
90
90
40
60
100
20
40
40
20
40
40
0.99999
6.5
300
5
75
4
Max.
18
13
7
-
9
6
8
-4
8
-4
8
-4
9
-
8
-4
Max.
-
140
4
300
200
-
±10
-
Unit
V
V
V
V
V
V
V
V
V
V
V
Unit
V
ke-
µV/e-
e-/pixel
e- rms
-
%
nm
Max.
40
40
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
10
-
Unit
MHz
MHz
pF
kHz
pF
pF
pF
pF
-
V
Ω
mA
mW