GS71208TP Datasheet, PDF (8/11 Pages) GSI Technology – 128K x 8 1Mb Asynchronous SRAM

Write Cycle 1: WE control
Address
OE
CE
WE
Data In
Data Out
Write Cycle 2: CE control
Address
OE
CE
WE
Data In
Data Out
tAS
tAS
tWC
tAW
tWR
tCW
tWP
tWHZ
tDW
tDH
DATA VALID
tWLZ
HIGH IMPEDANCE
tWC
tAW
tWR1
tCW
tWP
tDW
tDH
DATA VALID
HIGH IMPEDANCE
GS71208TP
Rev: 1.03 10/2001
8/11
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.