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| GS71208TP Datasheet, PDF (6/11 Pages) GSI Technology – 128K x 8 1Mb Asynchronous SRAM | |||
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Read Cycle 1: CE = OE = VIL, WE = VIH
Address
Data Out
tOH
Previous Data
tRC
tAA
Read Cycle 2: WE = VIH
Address
CE
OE
Data Out
tRC
tAA
tAC
tLZ
tOE
tOLZ
High impedance
Data valid
tHZ
tOHZ
DATA VALID
GS71208TP
Rev: 1.03 10/2001
6/11
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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