GS78132AB Datasheet, PDF (6/12 Pages) GSI Technology – 256K x 32 8Mb Asynchronous SRAM

AC Characteristics
Read Cycle
Parameter
Read cycle time
Address access time
Chip enable access time (CE)
Output enable to output valid (OE)
Output hold from address change
Chip enable to output in low Z (CE)
Output enable to output in low Z (OE)
Chip disable to output in High Z (CE)
Output disable to output in High Z (OE)
GS78132AB
-8
-10
-12
Symbol
Unit
Min Max Min Max Min Max
tRC
8
—
10
—
12
—
ns
tAA
—
8
—
10
—
12
ns
tAC
—
8
—
10
—
12
ns
tOE
—
3.5
—
4
—
5
ns
tOH
3
—
3
—
3
—
ns
tLZ^*
3
—
3
—
3
—
ns
tOLZ^*
0
—
0
—
0
—
ns
tHZ^*
—
4
—
5
—
6
ns
tOHZ^*
—
3.5
—
4
—
5
ns
Read Cycle 1:CE = OE = VIL , WE = VIH, BA = BB = BC = BD = VIL
Address
Data Out
t_OH
Previous Data
t_RC
t_AA
Data valid
Rev: 1.04 5/2006
6/12
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology