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GS82582DT21 Datasheet, PDF (4/27 Pages) GSI Technology – 288Mb SigmaQuad-II+ Burst of 4 SRAM
GS82582DT21/39GE-675S/633S/550S
Pin Description Table
Symbol
Description
Type
Comments
SA
Synchronous Address Inputs
Input
—
R
Synchronous Read
Input
Active Low
W
Synchronous Write
Input
Active Low
BWn
Synchronous Byte Writes
Input
Active Low
K
Input Clock
Input
Active High
K
Input Clock
Input
Active Low
Dn
Synchronous Data Inputs
Input
—
Qn
Synchronous Data Outputs
Output
—
CQ
Output Echo Clock
Output
—
CQ
Output Echo Clock
Output
—
QVLD
Q Valid Output
Output
—
Doff
Disable DLL when low
Input
Active Low
ODT
On-Die Termination
Input
Low = ODT is Low Impedance
High = ODT is High Impedance
ZQ
Output Impedance Matching Input
Input
—
TCK
Test Clock Input
Input
—
TMS
Test Mode Select
Input
—
TDI
Test Data Input
Input
—
TDO
Test Data Output
Output
—
VDD
Power Supply
Supply
1.8 V Nominal
VDDQ
Isolated Output Buffer Supply
Supply
1.5 V Nominal
VREF
HSTL Input Reference Voltage
Input
—
VSS
Power Supply: Ground
Supply
—
NC
No Connect
—
—
Notes:
1. NC = Not Connected to die or any other pin
2. When ZQ pin is directly connected to VDDQ, output impedance is set to minimum value and it cannot be connected to ground or left
unconnected.
3. K and K cannot be set to VREF voltage.
Rev: 1.01 4/2016
4/27
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2015, GSI Technology