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GS82582DT21 Datasheet, PDF (12/27 Pages) GSI Technology – 288Mb SigmaQuad-II+ Burst of 4 SRAM
GS82582DT21/39GE-675S/633S/550S
Capacitance
Parameter
Input Capacitance
Output Capacitance
Clock Capacitance
Note:
This parameter is sample tested.
Symbol
CIN
COUT
CCLK
Test conditions
VIN = 0 V
VOUT = 0 V
VIN = 0 V
(TA = 25oC, f = 1 MHZ, VDD = 1.8 V)
Typ
Max
Units
4
5
pF
6
7
pF
5
6
pF
AC Test Conditions
Parameter
Input high level
Input low level
Max. input slew rate
Input reference level
Output reference level
Note:
Test conditions as specified with output loading as shown unless otherwise noted.
Conditions
1.25 V
0.25 V
2 V/ns
0.75 V
VDDQ/2
AC Test Load Diagram
DQ
RQ = 250 (HSTL I/O)
50
VREF = 0.75 V
VT = 0.75 V
Input and Output Leakage Characteristics
Parameter
Symbol
Test Conditions
Min
Max
Input Leakage Current
(except mode pins)
IIL
VIN = 0 to VDD
–2 uA
2 uA
Doff
IILDOFF
VIN = 0 to VDD
–20 uA
2 uA
ODT
IILODT
VIN = 0 to VDD
–20 uA
2 uA
Output Leakage Current
IOL
Output Disable,
VOUT = 0 to VDDQ
–2 uA
2 uA
Rev: 1.01 4/2016
12/27
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2015, GSI Technology