GS81302T18GE-333I Datasheet, PDF (35/36 Pages) GSI Technology – 144Mb SigmaDDRTM-II Burst of 2 SRAM

Revision History
File Name
GS81302Txx_r1
GS81302Txx_r1.00a
GS81302Txx_r1.01
GS81302Txx_r1.02
GS81302Txx_r1.03
GS81302T08/09/18/36E-375/350/333/300/250
Types of Changes
Format or Content
Format
Content
Content
Content
Content
Revisions
• Creation of new datasheet
• Corrected Ordering Information Table
• Revised Four Bank Depth Expansion Schematic
• Revised Power Up Information
• Updated AC Characteristics Table
• Updated 165 BGA Package Drawing
• Updated JTAG Operating Port Information
• (Rev1.01a: removed CQ reference from SAMPLE-Z section in
JTAG Tap Instruction Set Summary)
• (Rev1.01b: Updated DLL Lock time to 2048 cycles)
• Removed 200 MHz and 167 MHz speed bins
• Added 375 MHz and 350 MHz speed bins
• Updated thermal information
• (Rev1.02a: Updated erroneous information in AC Char table)
• Added Op Currents
• Updated for MP status
• (Rev1.03a: Editorial updates)
• (Rev1.03b: Updated DLL lock time in AC Char table)
Rev: 1.03b 12/2011
35/35
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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