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| GS81302T18GE-333I Datasheet, PDF (10/36 Pages) GSI Technology – 144Mb SigmaDDRTM-II Burst of 2 SRAM | |||
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GS81302T08/09/18/36E-375/350/333/300/250
Common I/O SigmaDDR-II Burst of 2 SRAM Truth Table
DQ
Kn
LD
R/W
A+0
A+1
â
1
X
â
0
0
â
0
1
Note:
Q is controlled by K clocks if C clocks are not used.
Hi-Z
D@Kn+1
Q@Kn+1
or
Cn+1
Hi-Z
D@Kn+1
Q@Kn+2
or
Cn+2
Operation
Deselect
Write
Read
Rev: 1.03b 12/2011
10/35
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2011, GSI Technology
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