GS81302S08 Datasheet, PDF (16/35 Pages) GSI Technology – 144Mb SigmaSIOTM DDR -II Burst of 2 SRAM

GS81302S08/09/18/36E-375/350/333/300/250
Capacitance
(T_A = 25^oC, f = 1 MHZ, V_DD = 1.8 V)
Parameter
Input Capacitance
Output Capacitance
Clock Capacitance
Note:
This parameter is sample tested.
Symbol
C_IN
C_OUT
C_CLK
Test conditions
V_IN = 0 V
V_OUT = 0 V
—
Typ.
Max.
Unit
4
5
pF
6
7
pF
5
6
pF
AC Test Conditions
Parameter
Input high level
Input low level
Max. input slew rate
Input reference level
Output reference level
Note:
Test conditions as specified with output loading as shown unless otherwise noted.
Conditions
V_DDQ
0V
2 V/ns
V_DDQ/2
V_DDQ/2
AC Test Load Diagram
DQ
RQ = 250 Ω (HSTL I/O)
50Ω
V_REF = 0.75 V
VT = V_DDQ/2
Input and Output Leakage Characteristics
Parameter
Input Leakage Current
(except mode pins)
Doff
Symbol
I_IL
I_ILDOFF
Output Leakage Current
I_OL
Test Conditions
V_IN = 0 to V_DD
V_IN = 0 to V_DD
Output Disable,
V_OUT = 0 to V_DDQ
Min.
Max
–2 uA
2 uA
–20 uA
2 uA
–2 uA
2 uA
Rev: 1.03b 12/2011
16/35
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2011, GSI Technology