GS820E32AT Datasheet, PDF (15/21 Pages) GSI Technology – 64K x 32 2Mb Synchronous Burst SRAM

Pipeline Mode Timing (DCD)
GS820E32AT-180/166/133/4/5
Begin Read A Cont
CK
Deselect Deselect Write B
tKL
tKH
tKC
Read C Read C+1 Read C+2 Read C+3 Cont
ADSP
ADSC
ADV
Ao–An
GW
BW
Ba–Bd
E1
E2
E3
tS
tH
tS
tS
tH
A
tS
tS
tS
tH
tS
tH
tS
tH
ADSC initiated read
tH
B
C
tH
tH
tS
E2 and E3 only sampled with ADSC
G
DQa–DQd Hi-Z
tOE
tOHZ
Q(A)
tS
tH
D(B)
tKQ
tLZ
Q(C)
Q(C+1)
Q(C+2)
Deselect Deselect
Deselected with E1
Q(C+3)
tHZ
tKQX
Rev: 1.07 10/2004
15/21
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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