GS820E32AT Datasheet, PDF (14/21 Pages) GSI Technology – 64K x 32 2Mb Synchronous Burst SRAM

GS820E32AT-180/166/133/4/5
AC Electrical Characteristics
Parameter
-180
-166
-133(-4)
-5
Symbol
Unit
Min Max Min Max Min Max Min Max
Clock Cycle Time
tKC
5.5 — 6 — 7.5 — 10 —
ns
Pipeline
Clock to Output Valid
Clock to Output Invalid
tKQ
— 3.2 — 3.5 — 4 — 5
ns
tKQX 1.5 — 1.5 — 1.5 — 1.5 —
ns
Clock to Output in Low-Z
tLZ¹
1.5 — 1.5 — 1.5 — 1.5 —
ns
Clock Cycle Time
tKC
9.1 — 10 — 12 — 15 —
ns
Flow
Through
Clock to Output Valid
Clock to Output Invalid
tKQ
— 8 — 8.5 — 10 — 12
ns
tKQX
3—3—3—3—
ns
Clock to Output in Low-Z
tLZ¹
3—3—3—3—
ns
Clock HIGH Time
tKH
1.3 — 1.3 — 1.3 — 1.3 —
ns
Clock LOW Time
tKL
1.5 — 1.5 — 1.5 — 1.5 —
ns
Clock to Output in High-Z
tHZ¹
1.5 3.2 1.5 3.5 1.5 4 1.5 5
ns
G to Output Valid
tOE
— 3.2 — 3.5 — 4 — 5
ns
G to output in Low-Z
tOLZ¹
0—0—0—0—
ns
G to output in High-Z
tOHZ¹
— 3.2 — 3.5 —
4
—
5
ns
Setup time
tS
1.5 — 1.5 — 1.5 — 1.5 —
ns
Hold time
tH
0.5 — 0.5 — 0.5 — 0.5 —
ns
ZZ setup time
tZZS²
5—5—5—5—
ns
ZZ hold time
tZZH²
1—1—1—1—
ns
ZZ recovery
tZZR
20 — 20 — 20 — 20 —
ns
Notes:
1. These parameters are sampled and are not 100% tested.
2. ZZ is an asynchronous signal. However, in order to be recognized on any given clock cycle, ZZ must meet the specified setup and hold
times as specified above.
Rev: 1.07 10/2004
14/21
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2000, GSI Technology