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GS8180QV18D Datasheet, PDF (15/32 Pages) GSI Technology – 18Mb Burst of 2 SigmaQuad SRAM
GS8180QV18/36D-200/167/133/100*
Undershoot Measurement and Timing
VIH
VSS
50%
VSS – 1.0 V
20% tKHKH
Overshoot Measurement and Timing
VDD + 1.0 V
50%
20% tKHKH
VDD
VIL
Capacitance
(TA = 25oC, f = 1 MHZ, VDD = 3.3 V)
Parameter
Input Capacitance
Output Capacitance
Note:
This parameter is sample tested.
Symbol
CIN
COUT
Test conditions
VIN = 0 V
VOUT = 0 V
Typ. Max. Unit
4
5
pF
6
7
pF
AC Test Conditions
Parameter
Input high level
Input low level
Max. input slew rate
Input reference level
Output reference level
Notes:
Test conditions as specified with output loading as shown unless otherwise noted.
Conditions
VDDQ
0V
2 V/ns
VDDQ/2
VDDQ/2
AC Test Load Diagram
DQ
RQ = 250 Ω (HSTL I/O)
50Ω
VREF = 0.75 V
VT = VDDQ/2
Rev: 2.03 10/2004
15/32
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2002, GSI Technology