GS8170LW36AC Datasheet, PDF (14/32 Pages) GSI Technology – 18Mb Σ1x1Lp CMOS I/O Late Write SigmaRAM

GS8170LW36/72AC-350/333/300/250
Common I/O State Diagram
X,F,0,X or X,X,1,X
0,T,0,1
Bank
Deselect
1,T,0,X
0,T,0,0
X,F,0,X
Deselect
0,T,0,1
0,T,0,0
1,T,0,X or X,X,1,X
1,T,0,X
X,F,0,X
Read
0,T,0,0
0,T,0,1
1,T,0,X
Write
X,F,0,X
0,T,0,1
X,X,1,X
X,X,1,X
0,T,0,0
1,T,0,X
X,F,0,X
0,T,0,1
Read
Continue
0,T,0,0 0,T,0,1
0,T,0,0
Write
Continue
1,T,0,X
X,F,0,X
X,X,1,X
X,X,1,X
n
Key
Input Command Code
Clock (CK)
n+1
n+2
n+3
ƒ _Transition
Current State (n)
Next State (n + 1)
Command
ƒ
ƒ
ƒ
ƒ
Current State
Next State
Current State & Next State Definition for Read/Write Control State Diagram
Notes:
1. The notation “X,X,X,X” controlling the state transitions above indicate the states of inputs E1, E, ADV, and W respectively.
2. If (E2 = EP2 and E3 = EP3) then E = “T” else E = “F”.
3. “1” = input “high”; “0” = input “low”; “X” = input “don’t care”; “T” = input “true”; “F” = input “false”.
Rev: 1.04 4/2005
14/32
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology