GS6150 Datasheet, PDF (19/64 Pages) Gennum Corporation – Automatic or Manual Rate Selection

4.2 Reference Clock
The GS6150 can operate with or without an external frequency reference. For
applications requiring rapid asynchronous locking, a 27MHz reference or crystal is
required.
The PLL lock times for both referenceless and external crystal reference operation are
given in Table 2-3: AC Electrical Characteristics.
If a reference is connected to the XTAL_CLK_IN pin or a crystal is connected to the
XTAL_CLK_IN and XTAL_CLK_OUT pins of the device, it will automatically be used as the
reference frequency for rapid asynchronous lock. If XTAL_CLK_IN is not connected to a
crystal, XTAL_CLK_OUT must be left unconnected.
The XTAL_CLK_IN pin operates correctly when connected directly to the
XTAL_BUF_OUT from another GS6150, or a 27MHz output of a different device.
4.3 Signal Monitoring
The GS6150 measures and reports the following signal status and quality monitoring
parameters:
• Loss of Signal
• Lock Detection
• Rate Detection
• Low/High Bit Rate Detection
4.3.1 Loss of Signal Detection
LOS (Loss of Signal) detection is an active HIGH output available to the application on
any of the GPIO[3:0] multi-function status and control pins. It is selected for output using
the GPIO[3:0]_IO_SELECT and GPIO[3:0]_SELECT bits accessible in the
GPIO_CONTROL_REG_0 and GPIO_CONTROL_REG_1 registers. It is the default output of
the GPIO0 pin.
LOS indicates when the serial digital signal selected by the input selector is invalid. This
function is always active.
Two methods can be used to detect loss of signal: strength (default) and edge. Either
method can be selected with LOS_DETECTION_METHOD bits of register PLL_CONTROL.
When strength detection is used as the method of LOS detection the corresponding
GPIO pin will be HIGH (signal lost) when the input signal amplitude within a predefined
window falls below the threshold set by the bits DDI[0:3]_LOS_THRESHOLD_CONTROL
in the LOS_CONTROL_REG_1 and LOS_CONTROL_REG_2 registers. The LOS threshold
hysteresis can be set by the LOS_HYSTERESIS bits in the LOS_CONTROL_REG_0 register
at address F_h.
The corresponding GPIO pin will be LOW (signal present) when the input signal
amplitude within a predefined window is above the defined threshold.
GS6150
Final Data Sheet
PDS-060127
Rev.2
March 2015
www.semtech.com
19 of 64
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