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MB1503 Datasheet, PDF (9/15 Pages) Fujitsu Component Limited. – LOW-POWER PLL FREQUENCY SYNTHESIZER WITH POWER SAVE FUNCTION (1.1GHz)
Phase comparator output waveform (FC = High)
MB1503
fR
fP
LD
H
DO
fR > fP
Z
fR = fP
L
fR < fP
fR < fP
fR < fP
Notes: 1. Phase difference detection range: –2π to +2π
2. Spike appearance depends on the charge pump characteristics. Also, the spike is output to diminish
dead band.
3. When fR > fP or fR < fP, a spike might not appear depending on the charge pump characteristics.
4. LD is low when the phase difference is tw or more. LD is high when the phase difference is tw or less for
three or more cycles (when fOSCIN = 12.8MHz, tw = 625 to 1,250ns).
Analog switch
The LE signal turns the analog switch on or off. When the analog switch is turned on, the charge pump output (DO) is output through
the BiSW pin. When it is turned off, the BiSW pin is in the high-impedance state.
When LE = high (when the divide ratio of the internal divider is changed): Analog switch = on
When LE = low (normal operating mode): Analog switch = off
The LPF time constant can be decreased by inserting an analog switch between LPF1 and LPF2. This decreases the lock-up time
when the PLL channel is changed.
CHP
DO
LPF–1
LPF–2
(Control signal LE)
Analog
switch
BiSW
VCO
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