MB1503 Datasheet, PDF (8/15 Pages) Fujitsu Component Limited. – LOW-POWER PLL FREQUENCY SYNTHESIZER WITH POWER SAVE FUNCTION (1.1GHz)

MB1503
Intermittent operation
Intermittent operation limits power consumption by shutting down or starting the internal circuits according to their necessity. If device
operation resumes uncontrolled, the error signal output from the phase comparator may exceed the limit due to an undefined phase
relationship between the reference frequency (f_R) and the comparison frequency (f_P) and frequency lock is lost.
To prevent this, an intermittent operation control circuit is provided to decrease the variation in the locking frequency by forcibly
correcting the phase of both frequencies to limit the error signal output. This is done by the PS control circuit. If PS is set high, the
circuit enters the operating mode. If PS is set low, operation stops and the device enters the stand-by mode. Each mode is explained
below:
• Operating mode (PS =High Level)
All circuits are operating, and PLL operation is normal.
• Stand-by mode (PS = Low level)
Circuits that do not affect operation are powered down to limit current consumption.
The current in the power save state is typically 100µA.
At this time, the levels of D_O and LD are the same as when the PLL is locked.
Since D_O is placed in the high-impedance state and the input voltage of the voltage controlled oscillator (VCO) is set to the voltage
in the operating mode (when locked) by the time constant of the low-pass filter, the frequency output from the VCO (f_VCO) is kept at
the locking frequency.
The operating and stand-by modes alternate repeatedly. This intermittent operation limits the error signal by forcibly correcting the
phase of the reference and comparison frequencies to limit power consumption.
The device must be set in the stand-by mode (PS = low) when it is powered up.
Relationship between the FC input and phase characteristics
The FC pin changes the phase characteristics of the phase comparator. The internal charge pump output level (D_O) is reversed,
depending on the FC pin input level. The relationship between the FC input level and D_O is shown below:
f_R > f_P
FC = High or open
H
FC = Low
L
f_R < f_P
L
f_R = f_P
Z (∗1)
∗1: High impedance
When designing a synthesizer, the FC pin setting depends on the VCO characteristics.
H
Z (∗1)
1
∗: When the VCO characteristics are similar to
1 , set FC high or open.
∗: When the VCO characteristics are similar to
2 ^{, set FC low.}
VCO
output
frequency
2
VCO input voltage
8