MB86292 Datasheet, PDF (8/25 Pages) Fujitsu Component Limited. – Graphics Display Controller

MB86292
CKM
L
H
Clock Mode
Select internal PLL output.
Select host CPU bus clock (BCLKI).
• Use the CLKSEL pin to select the input clock frequency for using the internal PLL with CKM = L.
CLKSEL1 CLKSEL0
Input Clock Frequency
Multiplier
Display reference
clock
L
L
Input 13.5 MHz.
× 15 202.5 MHz
L
H
Input 14.32 MHz.
× 14 200.48 MHz
H
L
Input 17.73 MHz.
× 11 195.03 MHz
H
H
Reserved


Note : Immediately after turning the power supply on, input a pulse whose low level period is 500 ns or more to the
S pin before setting it to high level. After the S signal goes high, input the RESET signal at low level for 300
µs or more.
8