MB86292 Datasheet, PDF (18/25 Pages) Fujitsu Component Limited. – Graphics Display Controller

MB86292
(2) Video Interface
• Clock
Parameter
CLK frequency
CLK H period
CLK L period
DCLKI frequency
DCLKI H period
DCLKI L period
DCLKO frequency
Symbol Condition
fCLK

tHCLK

tLCLK

fDCLKI

tHDCLKI

tLDCLKI

fDCLKO

Min

25
25

5
5

Value
Typ
14.318






Unit
Max

MHz

ns

ns
67
MHz

ns

ns
67
MHz
• Input signals
Parameter
HSYNC input pulse width
HSYNC input setup time
HSYNC input hold time
VSYNC input pulse width
Symbol Condition
tWHSYNC0
*1
tWHSYNC1
*2
tSHSYNC
*2
tHHSYNC
*2
tWHSYNC1

Min
3
3
10
10
1
Value
Typ





Unit
Max

clock

clock

ns

ns

HSYNC
cycle
*1 : Applied only in PLL synchronization mode (CKS = 0) . The reference clock is the internal PLL’s output with
Cycle = 1/ (14 fCLK) .
*2 : Applied only in DCLKI synchronization mode (CKS = 1) . The reference clock is DCLKI.
• Output signals
Parameter
RGB output delay time
DISPE output delay time
HSYNC output delay time
VSYNC output delay time
CSYNC output delay time
GV output delay time
Symbol Condition
tRGB

tDEO

tDHSYNC

tDVSYNC

tDCSYNC

tDGV

Min
2
2
2
2
2
2
Value
Typ






Unit
Max
10
ns
10
ns
10
ns
10
ns
10
ns
10
ns
18