MB85RC64APNF-G Datasheet, PDF (8/32 Pages) Fujitsu Component Limited. – 64 K (8 K × 8) Bit I2C

MB85RC64A
■ COMMAND
• Byte Write
If the device address word (R/W “0” input ) is sent following the start condition, the slave responds with an
ACK. After this ACK, write addresses and data are sent in the same way, and the write ends by generating
a stop condition at the end.
S 1 0 1 0 A2 A1 A0 0 A
Address
High 8bits
A
Address
Low 8bits
A
Write
Data 8bits
AP
0 00XXXXX
MSB
X X X X X X XX
LSB
Access from master
Access from slave
Note : In the MB85RC64A, input “000” as the upper 3 bits of the MSB.
S Start Condition
P Stop Condition
A ACK (SDA is the "L" level)
• Page Write
If additional 8 bits are continuously sent after the same command (except stop condition) as Byte Write, a
page write is performed. The memory address rolls over to first memory address (0000H) at the end of the
address. Therefore, if more than 8 Kbytes are sent, the data is overwritten in order starting from the start of
the memory address that was written first. Because FRAM performs the high-speed write operations, the
data will be written to FRAM right after the ACK response finished.
S 1 0 1 0 A2 A1 A0 0 A
Address
High 8bits
A
Address
Low 8bits
A
Write
Data 8bits
A
Write
Data
... A P
Access from master
Access from slave
S Start Condition
P Stop Condition
A ACK (SDA is the "L" level)
Note : It is not necessary to take a period for internal write operation cycles from the buffer to the memory after
the stop condition is generated.
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DS501-00019-2v0-E