MB85RC64APNF-G Datasheet, PDF (31/32 Pages) Fujitsu Component Limited. – 64 K (8 K × 8) Bit I2C

MB85RC64A
■ MAJOR CHANGES IN THIS EDITION
A change on a page is indicated by a vertical line drawn on the left side of that page.
Page
Section
Change Results
■ FEATURES
1
Revised the Data retention
10 years ( + 85 °C)
→10 years ( + 85 °C), 95 years ( + 55 °C),
over 200 years ( + 35 °C)
■ POWER ON/OFF SEQUENCE Revised the following description:
“POWER ON SEQUENCE” → “POWER ON/OFF SEQUENCE”
14
■ FRAM CHARACTERISTICS
Added the following description:
“If the device does not operate within the specified conditions of
read cycle, write cycle or power on/off sequence, memory data
can not be guaranteed.”
Revised the following description:
“VDD pin is required to be rising from 0 V because turning the pow-
er on from an intermediate level may cause malfunctions, when
the power is turned on”
→“If VDD falls down below 2.0V, VDD is required to be started from
0V to prevent malfunctions when the power is turned on again.”
Revised the table and Note
DS501-00019-2v0-E
31