MB15F02SL Datasheet, PDF (7/25 Pages) Fujitsu Component Limited. – Dual Serial Input PLL Frequency Synthesizer

MB15F02SL
(Continued)
(VCC = 2.4 to 3.6 V, Ta = –40 to +85°C)
Parameter
Symbol
Condition
“H” level output current
“L” level output current
DoIF
DoRF
Charge pump
current rate
IDOL/IDOH
vs VDO
vs Ta
IDOH^*4
IDOL
IDOMT^*5
IDOVD^*6
IDOTA^*7
VCC = 3.0 V, CS bit = “H”
VDOH = VCC/2,
Ta = +25°C ^{CS bit = “L”}
VCC = 3.0 V, CS bit = “H”
VDOL= VCC/2,
Ta = +25°C ^{CS bit = “L”}
VDO = VCC/2
0.5 V ≤ VDO ≤ VCC – 0.5 V
–40°C ≤ Ta ≤ +85°C,
VDO = VCC/2
Min.
–
–
–
–
–
–
–
Value
Typ.
–6.0
–1.5
6.0
1.5
3
10
10
Unit
Max.
–
–
mA
–
–
–
%
–
%
–
%
*1: Conditions; fosc = 12 MHz, Ta = +25°C, in locking state.
*2: VCCIF = VCCRF = 3.0 V, fosc = 12.8 MHz, Ta = +25°C, in power saving mode.
*3: AC coupling. 1000pF capacitor is connected under the condition of min. operating frequency.
*4: The symbol “–” (minus) means direction of current flow.
*5: VCC = 3.0 V, Ta = +25°C (|I3| – |I4|)/[(|I3| + |I4|)/2] × 100(%)
*6: VCC = 3.0 V, Ta = +25°C [(|I2| – |I1|)/2]/[(|I1| + |I2|)/2] × 100(%) (Applied to each IDOL, IDOH)
*7: VCC = 3.0 V, [|IDO(+85°C) – IDO(–40°C)|/2]/[|IDO(+85°C) + IDO(–40°C)|/2] × 100(%) (Applied to each IDOL, IDOH)
*8: Prescaler divided ratio Charge pump current
finIF
VfinIF(min)
16/17
1.5 mA mode
50 MHz fin 500 MHz
–15 dBm
6.0 mA mode
50 MHz fin 300 MHz
–15 dBm
300 MHz < fin 500 MHz
–10 dBm
8/9
1.5 mA mode
50 MHz fin 300 MHz*
–15 dBm
300 MHz < fin 500 MHz
–15 dBm
6.0 mA mode
50 MHz fin 300 MHz* –15 dBm
300 MHz < fin 500 MHz
–10 dBm
* : VCC = 2.7 V to 3.6 V at 500 MHz,
VCC = 2.4 V to 3.6 V, Ta = –40°C to +85°C at fin < 500 MHz
I1
I3
IDOL
I2
IDOH
I2
I4
I1
0.5
Vcc/2 Vcc − 0.5 Vcc
Charge Pump Output Voltage (V)
7