MB85R256H Datasheet, PDF (4/14 Pages) Fujitsu Component Limited. – Memory FRAM CMOS 256 K (32 K × 8) Bit

MB85R256H
■ BLOCK DIAGRAM
A14 to A0
CE
WE
OE
A14 to A10
Block decoder
Address
latch
A7 to A0
Row de-
coder
FRAM array:
32,768 x 8
A8, A9
Column decoder
Control logic
I/O latch bus
driver
I/IO/O0-7I/Oto7 I/O0
■ FUNCTION LIST
Operation mode
CE
WE
OE
H
×
×
Standby precharge
×
L
L
Latch address
L
Write
L
L
H
Read
L
H
L
Output Disable
×
H
H
H: High level, L: Low level, x: Irrespective of “H” or “L”
I/O7 to I/O0
High-Z
⎯
Data input
Data output
High-Z
Power supply current
Standby
(ISB)
⎯
Operation (ICC)
4