MB39A214APFT-G-JNERE1 Datasheet, PDF (33/56 Pages) Fujitsu Component Limited. – 2ch DC/DC converter IC with PFM/ PWM synchronous rectification

MB39A214A
Selection of Switching FET
If selecting the high-side FET so that the value of the high-side FET conduction loss and the high-side FET
switching loss is same, the loss is effectively decreased.
Confirm that the high-side FET loss is within the rating value.
P_MainFET = P_{RON_Main} + P_{SW_Main}
P_MainFET : High-side FET loss [W]
P_{RON_Main} : High-side FET conduction loss [W]
P_{SW_Main} : High-side FET switching loss [W]
High-side FET conduction loss
P_{RON_Main} = I_{OUT_MAX2} ¯
V_OUT
V_IN
¯
R_{ON_Main}
P_{RON_Main} : High-side FET conduction loss [W]
I_{OUT_MAX} : Maximum load current [A]
V_IN
: Power supply voltage [V]
V_OUT : Output voltage [V]
R_{ON_Main} : ON resistance of high-side FET [Ω]
The high-side FET switching loss can be calculated roughly by the following formula.
P_{SW_Main} 1.56 ¯ V_IN ¯ f_OSC ¯ I_{OUT_MAX} ¯ Q_SW
P_{SW_Main} : Switching loss [W]
V_IN
: Power supply voltage [V]
f_OSC : Switching frequency [Hz]
I_{OUT_MAX} : Maximum load current [A]
Q_SW : Amount of high-side FET gate switch electric charge [C]
MOSFET has a tendency where the gate drive loss increases because the lower drive voltage product has
the bigger amount of gate electric charge (Q_G). Normally, we recommend a 4 V drive product, however, the
idle period at light load (both the high-side FET and the low-side FET is off-period) gets longer and the gate
drive voltage of the high-side FET may decrease, in the automatic PFM/PWM selection mode. The voltage
drops most at no-load mode. At this time, confirm that the boost voltage (voltage between BST-LX pins) is
a big enough value for the gate threshold value voltage of the high-side FET.
If it is not enough, consider adding the boost diode, increasing the capacitor value of the boost capacitor or
using a 2.5 V (or 1.8 V) drive product to the high-side FET.
Select the ON resistance of low-side FET from the range below.
R_{ON_Sync} ≤
0.2
(I_LIM − ^ΔIL )
2
, R_{ON_Sync} ≤
0.1
0.015
ΔI_L ^{, RON_Sync ≥} ΔI_L
R_{ON_Sync}
ΔI_L
I_LIM
: ON resistance of low-side FET [Ω]
: Ripple current peak-to-peak value of inductor [A]
: Over current detection value [A]
DS405-00007-1v0-E
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