MB39A214APFT-G-JNERE1 Datasheet, PDF (16/56 Pages) Fujitsu Component Limited. – 2ch DC/DC converter IC with PFM/ PWM synchronous rectification

MB39A214A
(5) DC/DC converter stop sequence (Discharge, standby)
When the EN1 pin (pin 2) or EN2 pin (pin 11) is set to the “L” level, the output capacitor is discharged
using the discharge FET (R_ON 25 Ω) in the IC. If the voltage of the VOUT1 pin (pin 3) and VOUT2 pin
(pin 10) is below 0.2 V (Typ) by discharging the output capacitor, the IC stops discharge operation. Further,
if both the EN1 and EN2 pins are set to the “L” level, the IC also stops the output of the VB pin and enters
the standby state after detecting UVLO. The current of the VCC pin (I_VCC) is then 10 µA (Max).
<Timing chart>
EN1
VB
CS1
DRVH1
DRVL1
VOUT1
EN2
0.2 V
1.6 V
Standby
UVLO VTHL
CH1 discharge FET ON
CS2
1.6 V
DRVH2
DRVL2
VOUT2
CH2 discharge FET ON
0.2 V
(6) Under Voltage Lockout Protection (UVLO)
The under voltage lockout protection (UVLO) protects ICs from malfunction and protects the system from
destruction/deterioration, according to the reasons mentioned below.
y Transitional state when the bias voltage (VB) or the reference voltage (VREF) starts.
y Momentary decrease
To prevent such a malfunction, this function detects a voltage drop of the VB pin (pin 18) using the
comparator (UVLO Comp.), and stops IC operations.
When the VB pin exceeds the threshold voltage of the under voltage lockout protection circuit, the system
is restored.
16
DS405-00007-1v0-E