MB39A214APFT-G-JNERE1 Datasheet, PDF (14/56 Pages) Fujitsu Component Limited. – 2ch DC/DC converter IC with PFM/ PWM synchronous rectification

MB39A214A
(1) Bias Voltage Block (VB Reg.)
The 5.2 V (Typ) bias voltage is generated from the VCC pin voltage for the control, output, and boost
circuits. When either or both of the EN1 pin (pin 2) and EN2 pin (pin 11) are set to the “H” level, the
system is restored from the standby state to supply the bias voltage from the VB pin (pin 18).
(2) ON/OFF Time Generator Block (t_ON Generator)
This block contains a capacitor for timing setting and a resistor for timing setting and generates ON time
(t_ON) which depends on input voltage and output voltage. The switching frequency can be switched by
setting the FREQ pin (pin 7) to any one of GND connection, OPEN, and VB connection. ON time for each
CH is obtained from the following formula.
<FREQ pin : GND connection>
t_ON1 (ns) =
V_{VOUT1 ¯ 4300}
V_VIN
(f_OSC1
230 kHz)
t_ON2 (ns) =
V_{VOUT2 ¯ 3200}
V_VIN
(f_OSC2
310 kHz)
<FREQ pin : OPEN>
t_ON1 (ns) =
V_{VOUT1 ¯ 2100}
V_VIN
(f_OSC1
460 kHz)
t_ON2 (ns) =
V_{VOUT2 ¯ 1600}
V_VIN
(f_OSC2
620 kHz)
<FREQ pin : VB connection>
t_ON1 (ns) =
V_{VOUT1 ¯ 1300}
V_VIN
(f_OSC1
750 kHz)
t_ON2 (ns) =
V_{VOUT2 ¯ 1000}
V_VIN
(f_OSC2
1000 kHz)
The switching frequency of CH2 is set to 1.33 times that of CH1 to prevent the beat by the frequency
difference of channel to channel.
(3) Output Block (DRV1, DRV2)
The output circuit is configured in CMOS type for both of the high-side and the low-side. It provides the
0.5 A (Typ) source current and 0.9 A (Typ) sink current, drive the external N-ch MOS FET. The output
circuit of the high-side FET supplies the power from the boost circuit including the built-in boost diode. The
output circuit of the low-side FET supplies the power from the VB pin. This circuit monitors the gate
voltages of the high-side and low-side FETs. Until either FET is turned off, this circuit controls the ON
timing of another FET, preventing the shoot-through current. The sink ON resistance of the output circuit is
low 1 Ω (Typ), improve the self turn on margin of low-side FET.
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DS405-00007-1v0-E