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MB1519 Datasheet, PDF (3/16 Pages) Fujitsu Component Limited. – DUAL SERIAL INPUT PLL FREQUENCY SYNTHESIZER
BLOCK DESCRIPTIONS
TRANSMIT/RECEPTION BLOCK
• 20-bit latch
• Programmable divider consisting of:
Binary 7-bit swallow counter (Divide ratio: 0 to 127)
Binary 11-bit programmable counter (Divide ratio: 16 to 2047)
• Phase detector with phase polarity change function
• 600MHz dual modulus prescaler (Divide ratio: 64/65)
• Charge pump
COMMON BLOCK
• 23-bit shift register
• Programmable divider consisting of:
Reference counter (Divide ratio: 512, 1024)
(Divide frequency = 25kHz, 12.5kHz (Crystal oscillator frequency = 12.8MHz)
• Crystal oscillator
• fp monitor output selector
• Latch selector
• Schmitt circuits
• Analog switches
MB1519
3