MB15E03SLPFV1-G-BND-6E1 Datasheet, PDF (27/32 Pages) Fujitsu Component Limited. – Single PLL Frequency Synthesizers with On-Chip Prescalers

Single PLL Frequency Synthesizers with On-Chip Prescalers
Phase Detector Output Waveform
fr
fp
LD
(FC bit = High)
Do
(FC bit = Low)
Do
t_WU
H
Z
Z
t_WL
L
Notes:
1) Phase error detection range: –2π to +2π
2) Pulses on Do signal during locked state are output to prevent dead zone.
3) LD output becomes low when phase is t_WU or more. LD output becomes high when phase error is t_WL
or less and continues to be so for three cycles or more.
4) t_WU and t_WL depend on OSC_IN input frequency.
t_WU > 2/fosc (s) (e. g. t_WU > 156.3ns, fosc = 12.8MHz)
t_WU < 4/fosc (s) (e. g. t_WL < 312.5ns, fosc = 12.8MHz)
5) LD becomes high during the power-saving mode (PS = “L”).
26 Fujitsu Microelectronics, Inc.