MB8508S064CF Datasheet, PDF (14/20 Pages) Fujitsu Component Limited. – 8 M X 64 BIT SYNCHRONOUS DYNAMIC RAM SO-DIMM

MB8508S064CF-100/-100L
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s SERIAL PRESENCE DETECT(SPD) FUNCTION
1. PIN DESCRIPTIONS
SCL (Serial Clock)
SCL input is used to clock all data input/output of SPD
SDA (Serial Data)
SDA is a common pin used for all data input/output of SPD. The SDA pull-up resistor is required due to the
open-drain output.
SA0, SA1, SA2 (Address)
Address inputs are used to set the least significant three bits of the eight bits slave address. The address inputs
must be fixed to select a particular module and the fixed address of each module must be different each other.
For this module, any address inputs are not required because all addresses (SA0, SA1, SA2) are driven to VSS
on the module.
2. SPD OPERATIONS
CLOCK and DATA CONVENTION
Data states on the SDA can change only during SCL = Low. SDA state changes during SCL = High are indicated
start and stop conditions. Refer to Fig. 1 below.
START CONDITION
All commands are preceded by a start condition, which is a transition of SDA state from High to Low when SCL
= High. SPD will not respond to any command until this condition has been met.
STOP CONDITION
All read or write operation must be terminated by a stop condition, which is a transition of SDA state from Low
to High when SCL = High. The stop condition is also used to make the SPD into the state of standby power
mode after a read sequence.
Fig. 1 – START AND STOP CONDITIONS
SCL
SDA
START
START = High to Low transition of SDA state when SCL is High
STOP = Low to High transition of SDA state when SCL is High
STOP
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