MB15C03 Datasheet, PDF (14/24 Pages) Fujitsu Component Limited. – Single Serial Input PLL Frequency Synthesizer On-Chip prescaler

MB15C03
Data
Clock
LE
Figure 5 Serial data input timing
t2
t3
t1
t4
t5
Since the divide rations are unpredictable when the MB15C03 is turned on, it is necessary to initialize the divide
ratio for both dividers at power-on time. As shown in Figure 6, after setting the divide ratio for one of the dividers
(e.g., programmable reference divider), set LE to “H” level before setting the divide ratio for the other divider
(e.g., programmable divider). To change the divide ratio of one of the dividers after initialization, input the serial
data only for that divider (the divide ratio for the other divider is preserved).
Figure 6 Inputting serial data (Setting divisors)
Data
Clock
LE
Serial data for programmable
reference divider
C
16 clocks
Serial data for programmable
C
divider
20 clocks
* : Control bit(2 bits)
14