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MB15F72UL Datasheet, PDF (10/27 Pages) Fujitsu Component Limited. – Dual Serial Input PLL Frequency Synthesizer | |||
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MB15F72UL
⢠Prescaler Data Setting (SW)
Divide ratio
Prescaler divide ratio IF-PLL
Prescaler divide ratio RF-PLL
SW = â1â
8/9
64/65
⢠Charge Pump Current Setting (CS)
Current value
CS
±6.0 mA
1
±1.5 mA
0
SW = â0â
16/17
128/129
⢠LD/fout output Selectable Bit Setting
LD/fout pin state
LDS
T1
T2
0
0
0
LD output
0
1
0
0
1
1
frIF
1
0
0
fout
frRF
1
1
0
outputs
fpIF
1
0
1
fpRF
1
1
1
⢠Phase Comparator Phase Switching Data Setting (FCIF, FCRF)
Phase comparator input
FCIF = â1â FCRF = â1â FCIF = â0â FCRF = â0â
DoIF
DoRF
DoIF
DoRF
fr > fp
H
L
fr < fp
L
H
fr = fp
Z
Z
Z : High-impedance
Depending upon the VCO and LPF polarity, FC bit should be set.
High
(1)
(1) VCO polarity FC = â1â
(2) VCO polarity FC = â0â
VCO Output
Frequency
Note : Give attention to the polarity for using active type LPF.
LPF Output voltage
(2)
Max.
10
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