MB8508S064CE-100 Datasheet, PDF (1/20 Pages) Fujitsu Component Limited. – 8 M x 64 BIT SYNCHRONOUS DYNAMIC RAM SO-DIMM

FUJITSU SEMICONDUCTOR
DATA SHEET
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DS05-11147-1E
MEMORY
Un-buffered
8 M × 64 BIT
SYNCHRONOUS DYNAMIC RAM SO-DIMM
MB8508S064CE-100/-100L
144-pin, 2 Clock, 1-bank, based on 8 M × 8 Bit SDRAMs with SPD
s DESCRIPTION
The Fujitsu MB8508S064CE is a fully decoded, CMOS Synchronous Dynamic Random Access Memory
(SDRAM) Module consisting of eight MB81F64842C devices which organized as two banks of 8 M × 8 bits and
a 2K-bit serial EEPROM on a 144-pin glass-epoxy substrate.
The MB8508S064CE features a fully synchronous operation referenced to a positive edge clock whereby all
operations are synchronized at a clock input which enables high performance and simple user interface
coexistence.
The MB8508S064CE is optimized for those applications requiring high speed, high performance and large
memory storage, and high density memory organizations.
This module is ideally suited for workstations, PCs, laser printers, and other applications where a simple interface
is needed.
s PRODUCT LINE & FEATURES
Parameter
Clock Frequency
Burst Mode Cycle Time
Access Time from Clock
Operating Current
Power Down Mode Current (ICC2P)
Self Refresh Current (ICC6)
-100
16 mA max.
8 mA max.
MB8508S064CE
100 MHz max.
10 ns min.
8.5 ns max. (CL = 3)
680 mA max.
-100L
8 mA max.
4 mA max.
• Unbuffered 144-pin SO-DIMM Socket Type
(Lead pitch: 0.8 mm)
• Conformed to JEDEC Standard (2 CLK)
• Organization: 8,388,608 words × 64 bits
• Memory: MB81F64842C (8 M × 8, 4-bank) × 8 pcs.
• 3.3 V ±0.3 V Supply Voltage
• All input/output LVTTL compatible
• 4096 Refresh Cycle every 65.6 ms
• Auto and Self Refresh
• CKE Power Down Mode
• DQM Byte Masking (Read/Write)
• Serial Presence Detect (SPD) with Serial EEPROM:
JEDEC Standard SPD Format
• Module size:
1.25” (height) × 2.66” (length) × 0.15” (thickness)
• CL-tRCD-tRP: 3-3-3 clk min. @100 MHz,
2-2-2 clk min. @66 MHz