e421371 Datasheet, PDF (14/29 Pages) Fuji Electric – Fractional-N PLL Frequency Synthesizer

MB15F83UL
3. Serial Data Input Timing
1st data
Data
Clock
MSB
2nd data
Control bit Invalid data
LSB
LE
t1
t2
t7
t3
t4
t5
t6
On the rising edge of the clock, one bit of data is transferred into shift register.
Parameter Min. Typ. Max. Unit
Parameter Min. Typ. Max. Unit
t1
20


ns
t5
100  
ns
t2
20


ns
t6
20  
ns
t3
30


ns
t7
100  
ns
t4
30


ns
Note : LE should be “L” when the data is transferred into the shift register.
14