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MCIMX35_10 Datasheet, PDF (99/148 Pages) Freescale Semiconductor, Inc – i.MX35 Applications Processors for Industrial and Consumer Products
Table 60. MLB Device 1024Fs Timing Parameters (continued)
Parameter
Symbol
Min
Typ
Max
Units
Comment
MLBCLK high time
tmckh
9.7
9.3
MLBCLK pulse width variation tmpwv
—
MLBSIG/MLBDAT input valid tdsmcf
1
to MLBCLK falling
10.6
10.2
—
—
—
ns
—
0.7
ns pp
—
ns
PLL unlocked
Note2
—
MLBSIG/MLBDAT input hold tdhmcf
0
—
—
ns
—
from MLBCLK low
MLBSIG/MLBDAT output high tmcfdz
0
—
tmckl
ns
—
impedance from MLBCLK low
Bus Hold Time
tmdzh
2
—
—
ns
Note3
1 The MLB Controller can shut off MLBCLK to place MediaLB in a low-power state.
2 Pulse width variation is measured at 1.25 V by triggering on one edge of MLBCLK and measuring the spread on the other edge,
measured in ns peak-to-peak (pp)
3 The board must be designed to insure that the high-impedance bus does not leave the logic state of the final driven bit for this
time period. Therefore, coupling must be minimized while meeting the maximum capacitive load listed.
4.9.16 1-Wire Timing Specifications
Figure 71 depicts the RPP timing, and Table 61 lists the RPP timing parameters.
1-Wire bus
(BATT_LINE)
1-WIRE Tx
“Reset Pulse”
DS2502 Tx
“Presence Pulse”
OW2
ID
OW1
OW2
OW3
OW4
OW1
OW3
OW4
Figure 71. Reset and Presence Pulses (RPP) Timing Diagram
Table 61. RPP Sequence Delay Comparisons Timing Parameters
Parameters
Reset time low
Presence detect high
Presence detect low
Reset time high
Symbol
tRSTL
tPDH
tPDL
tRSTH
Min.
480
15
60
480
Typ.
511
—
—
512
Max.
—
60
240
—
Units
µs
µs
µs
µs
i.MX35 Applications Processors for Automotive Products, Rev. 8
Freescale Semiconductor
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