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MCIMX35_10 Datasheet, PDF (57/148 Pages) Freescale Semiconductor, Inc – i.MX35 Applications Processors for Industrial and Consumer Products
4.9.6 Enhanced Serial Audio Interface (ESAI) Timing Specifications
The ESAI consists of independent transmitter and receiver sections, each section with its own clock
generator. Table 43 shows the interface timing values. The number field in the table refers to timing signals
found in Figure 37 and Figure 38.
Table 43. Enhanced Serial Audio Interface Timing
No.
62 Clock cycle4
Characteristics1,2
63 Clock high period
• For internal clock
• For external clock
64 Clock low period
• For internal clock
• For external clock
65 SCKR rising edge to FSR out (bl) high
66 SCKR rising edge to FSR out (bl) low
67 SCKR rising edge to FSR out (wr) high5
68 SCKR rising edge to FSR out (wr) low5
69 SCKR rising edge to FSR out (wl) high
70 SCKR rising edge to FSR out (wl) low
71 Data in setup time before SCKR (SCK in synchronous
mode) falling edge
72 Data in hold time after SCKR falling edge
73 FSR input (bl, wr) high before SCKR falling edge5
74 FSR input (wl) high before SCKR falling edge
75 FSR input hold time after SCKR falling edge
78 SCKT rising edge to FST out (bl) high
79 SCKT rising edge to FST out (bl) low
Symbol Expression2 Min. Max. Condition3 Unit
tSSICC
4 × Tc
4 × Tc
30.0 —
30.0 —
—
2 × Tc − 9.0 6
—
i ck
ns
i ck
ns
—
—
2 × Tc
15
—
—
2 × Tc − 9.0 6
—
—
ns
—
—
2 × Tc
15
—
—
—
—
— 17.0
x ck
ns
—
—
— 7.0
i ck a
—
—
— 17.0
x ck
ns
—
—
— 7.0
i ck a
—
—
— 19.0
x ck
ns
—
—
— 9.0
i ck a
—
—
— 19.0
x ck
ns
—
—
— 9.0
i ck a
—
—
— 16.0
x ck
ns
—
—
— 6.0
i ck a
—
—
— 17.0
x ck
ns
—
—
— 7.0
i ck a
—
—
12.0 —
x ck
ns
—
—
19.0 —
i ck
—
—
3.5 —
x ck
ns
—
—
9.0 —
i ck
—
—
2.0 —
x ck
ns
—
—
12.0 —
i ck a
—
—
2.0 —
x ck
ns
—
—
12.0 —
i ck a
—
—
2.5 —
x ck
ns
—
—
8.5 —
i ck a
—
—
— 18.0
x ck
ns
—
—
— 8.0
i ck
—
—
— 20.0
x ck
ns
—
—
— 10.0
i ck
i.MX35 Applications Processors for Automotive Products, Rev. 8
Freescale Semiconductor
57