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MCIMX35_101 Datasheet, PDF (91/148 Pages) Freescale Semiconductor, Inc – i.MX35 Applications Processors for Industrial and Consumer Products | |||
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Table 55. Asynchronous Serial Interface Timing ParametersâAccess Level (continued)
ID
Parameter
Symbol
Min.
Typ.1
Max.
Units
IP55 Controls hold time for read Tdchr Tdicpr â Tdicdr â 1.5
Tdicpr â Tdicdr
â
ns
IP56 Controls setup time for write Tdcsw Tdicuw â 1.5
Tdicuw
â
ns
IP57 Controls hold time for write Tdchw Tdicpw â Tdicdw â 1.5 Tdicpw â Tdicdw
â
ns
IP58 Slave device data delay8
Tracc 0
â
Tdrp9 â Tlbd10 â Tdicur
ns
â 1.5
IP59 Slave device data hold time8 Troh Tdrp â Tlbd â Tdicdr
+ 1.5
â
Tdicpr â Tdicdr â 1.5
ns
IP60 Write data setup time
Tds Tdicdw â 1.5
Tdicdw
â
ns
IP61 Write data hold time
Tdh Tdicpw â Tdicdw â 1.5 Tdicpw â Tdicdw
â
ns
IP62 Read period2
Tdicpr Tdicpr â 1.5
Tdicpr
Tdicpr + 1.5
ns
IP63 Write period3
Tdicpw Tdicpw â 1.5
Tdicpw
Tdicpw + 1.5
ns
IP64 Read down time4
Tdicdr Tdicdr â 1.5
Tdicdr
Tdicdr + 1.5
ns
IP65 Read up time5
Tdicur Tdicur â 1.5
Tdicur
Tdicur + 1.5
ns
IP66 Write down time6
Tdicdw Tdicdw â 1.5
Tdicdw
Tdicdw + 1.5
ns
IP67 Write up time7
Tdicuw Tdicuw â 1.5
Tdicuw
Tdicuw + 1.5
ns
IP68 Read time point9
Tdrp Tdrp â 1.5
Tdrp
Tdrp + 1.5
ns
1 The exact conditions have not been finalized, but will likely match the current customer requirement for their specific display.
These conditions may be device specific.
2 Display interface clock period value for read:
Tdicpr
=
THSP_CLK â
c eil
D-----I--S---P----#---_---I--F---_---C----L----K----_---P---E----R----_---R----D---
HSP_CLK_PERIOD
3 Display interface clock period value for write:
Tdicpw
=
THSP_CLK â
ce il
D-----I--S---P----#---_---I--F---_---C----L----K----_---P---E----R----_---W------R--
HSP_CLK_PERIOD
4 Display interface clock down time for read:
Tdicdr
=
1--
2
THSP_CLK
â
ceil
2-----â
---D----I--S----P---#---_---I--F---_---C----L----K----_----D----O----W------N----_---R----D---
HSP_CLK_PERIOD
5 Display interface clock up time for read:
Tdi cur = 12-- THSP_CLK â
cei l 2-----â
---D--H--I--SS----PP---_#---C_---I-L-F---K_----C_---PL---E-K---R-_---I-U-O---P-D--_---R----D---
6 Display interface clock down time for write:
Tdicdw
=
1--
2
THSP_CLK
â
ce
i
l
2-----â
---D----I--S----P---#---_---I--F---_---C----L----K----_----D----O----W------N----_---W------R--
HSP_CLK_PERIOD
7 Display interface clock up time for write:
Tdi cuw = 12--THSP_CLK â
ce il 2-----â
---D--H--I--S-S---PP---#_---_C---I-L-F---K-_--C-_---P-L---EK---R-_----UI-O---P--D-_---W------R--
8 This parameter is a requirement to the display connected to the IPU.
i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 8
Freescale Semiconductor
91
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