MCIMX25_1 Datasheet, PDF (91/132 Pages) Freescale Semiconductor, Inc – i.MX25 Applications Processor for Consumer and Industrial Products

3.6.12 Liquid Crystal Display Controller (LCDC) Timing
Figure 65 and Figure 66 show LCDC timing in non-TFT and TFT mode respectively, and Table 67 and
Table 68 list the timing parameters used in the associated figures.
T5
VSYNC
HSYNC
Line 1 Line 2
Line n Line 1
T2
HSYNC
T1
T6
LSCLK
T3 T4
LD
Figure 65. LCDC Non-TFT Mode Timing Diagram
Table 67. LCDC Non-TFT Mode Timing Parameters
ID
Description
T1
Pixel clock period
T2
HSYNC width
T3
LD setup time
T4
LD hold time
T5
Wait between HSYNC and VSYNC rising edge
T6
Wait between last data and HSYNC rising edge
1 _{T is pixel clock period}
Min.
22.5
1
5
5
2
1
Max.
1000
—
—
—
—
—
Unit
ns
T¹
ns
ns
T¹
T¹
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 1
Freescale Semiconductor
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